SERIAL 4-WIRE
RTC-9701JE
DC characteristic Timing operation Initial setting
Processing terminals Setting register Time and calendar
Access operation (READ/WRITE) Timer interrupting function Others
　
DC characteristic
　
Timing operation
　
Initial setting
Setting register
Q Which registers do we set to the initial state when a power is activated? Should power be re-activated at the initial setting?
A Set the all register. There is no need to re-activate the power to set a register to the initial state.

The Ready signal is not output at the initial power activation, occasionally resulting in the continued output of a Busy signal.
Please set the register in the "D" address to the initial state and set all registers thereafter while ignoring the Busy signal.
The Ready signal is output when the "D" address is set.
There is no need to re-activate the power to set a register to the initial state.
Definition of initial power activation
Q What kind of state is "when the initial power is activated"?
A This is the state when a power is initially applied to VDD2 , or when power is applied to VDD2 again after the state where the backup voltage is lower than necessary for clock operation (oscillation is stopped.)
　
Processing terminals
　
Setting register
　
Time and calendar
　
Access operation (READ/WRITE)
Definition of Write enable mode
Q What is Write enable mode? When should this mode be set?
A This process permits writing data into EEPROM.
Please perform this processing after power activation and before first accessing EEPROM.

We recommend this be performed once after the initial setting of a register. If the power source of VDD or VDD2 is turned off, please run the Write enable mode again after activating the power source.
Accesses to EEPROM
Q Are there any way to check if the number of EEPROM rewrites surpasses the guaranteed level?
A There is no way to check the number of EEPROM rewrites.
　
Timer interrupting function
　
Others